Digital VLSI Chip Design with Cadence and Synopsys CAD Tools
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| Size | 23 MB (23,082 KB) |
|---|---|
| Format | |
| Downloaded | 612 times |
| Status | Available |
| Last checked | 10 Hour ago! |
| Author | Erik Brunvand |
“Book Descriptions: Digital VLSI Chip Design with Cadence and Synopsys CAD Tools leads students through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. This hands-on book is for use in conjunction with a primary textbook on digital VLSI. Read more”
